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Design Of Dual Core Navigation Computer Based On FPGA

Posted on:2013-08-03Degree:MasterType:Thesis
Country:ChinaCandidate:B WangFull Text:PDF
GTID:2248330377958389Subject:Precision instruments and machinery
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With the continuous development of navigation technology, the design of navigationsystem is becoming increasingly important. At present the design of navigation system indomestic, mostly using masterslave structure of two or even more pieces of microprocessor,one piece is responsible for high speed data acquisition task, one piece is responsible forcomplex navigation calculation. This kind of method is feasible in general application, andcan achieve use requirement. But cannot meet the system requirements in the system whichhave strict restrictions in the volume and power consumption, And the communication of themasterslave processor is also a bottleneck of this structure, and another existed problem isthe flexibility is poorer. And the structure appear some redundancy with the development ofembedded multi-processor FPGA.Multiprocessor systems possess the benefit of increased performance, but nearly alwaysat the price of significantly increased system complexity for both hardware and software. Theidea of using multiple processors to perform different tasks and functions on differentprocessors in real-time embedded applications is gaining popularity. Altera FPGAs provide anideal platform for developing embedded multiprocessor systems, because the hardware caneasily be modified and tuned using the Qsys tool to provide optimal system performance.Increases in the size of Altera FPGAs make possible system designs with many Nios IIprocessors on a single chip. Furthermore, with a powerful integration tool like Qsys, differentsystem configurations can be designed, built, and evaluated very quickly. Qsys enableshierarchical designs, reducing system complexity through compartmentalization of the designinto discrete subsystems. Each subsystem exports user-defined interfaces, linking thesubsystem hierarchy together.To design the embedded navigation computer system on FPGA with SOPC method,Changed the current pattern that general processor DSP+MCU (CPLD) leading thenavigation computer design, the recent development status of FPGA field shows, the gapbetween DSP and FPGA is narrowing. And use specific FPGA can get advantage beyond DSP.The design mode of hardware and software collaborative and customizability is moreappropriately to fit the requirements of processing power and external interface flexible of thestrapdown navigation system, has a very strong application value and broad application prospect.
Keywords/Search Tags:Embedded Navigation computer, Dual core, FPGA, Inertial NavigationSystem
PDF Full Text Request
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