The Data Processing Of The Ethernet MAC Layer Based On FPGAs

With the rapid development of IT, the embedded devices of accessing to Ethernetare used more and more widely. In order to make each device enjoy a fair andeffective shared communications medium, it is particularly important to research thedata processing system of the Ethernet MAC layer. At present, the system often usesASIC chips, which has weak portability and flexibility, limited data processingcapability.To this end, it is firstly done to analyze the basic connotation of Ethernet and therelated agreements, and to dissect the communication mechanisms of the EthernetMAC layer, the characteristics and format of the frame, the PHY interface protocol,the ARP protocol, I2C protocol in the paper. According to the characteristics andworking principle of the FPGA chip, the system design, which supports the accessingof the10Base-T,100Base-TX,1000Base-T Ethernet, is determined based on thecombination of the88E1111PHY chip and XC3S400-4fg456C FPGA chip of Xilinx.Then the hardware circuit design is accomplished by the Cadence development tool.In this system,88E1111and FPGA respectively completes the data processing of PHYlayer and the data processing of the MAC layer, which mainly consists of thecalibration and dearchive of the receiving data frames, the encapsulation of the dataframes, the MAC address filtering, the extraction of the IP packet, The ARP addressmapping, and so on. So FPGA is the core of the system. Following the top-downdesign conception, the design of FPGA successively includes the top-level module,and the submodule of the PHY interface, the MAC core processing, the userconfiguration, the user data interface. It is processing in design of FPGA to completethe coding with Verilog HDL, the functional simulating of each module, the timingconstraints, the analysis and design of the implementation and routing, by the ISE development suit and ModelSim SE. Eventually, the system’s tested and debugged onIPQAM equipment. The results show that the system is stable, and basically meet theneeds of the technical requirements expected. And this system has low cost, shortcycle, high level of integration, good portability, low power consumption, and can bewidely used in the front-end design of IPTV, video and network monitoring, smarthome etc..