Ultra-high-speed Digital Framing Camera Shutter Control Circuit

Playing a very important role in modern science research, the high-speed photographic camera, by virtue of its high temporal resolution, helps transcend the limits of the human visual sense to open a window for studies on transient optical and exploration of super-high-speed physical phenomena.As a high-speed camera which adopts optical system to static framing and shutter controlled by circuit to control photography, ultra-high-speed digital framing camera, is characterized not only by good spatial resolution, time resolution up to a nanosecond, but also by small size, light weight, simple operation and low power consumption. The main tasks of this dissertation are summarized as follows:1. The principles and indicators are analyzed for high-speed framing camera shutter system, propose an available high-speed shutter control circuit design required by ultra-high-speed digital farming camera while taking traditional framing camera programs as well as modern digital circuit technology in to consideration.2. High-speed CPLD control analog delay line chip for precise delay is applied to get low-voltage pulse with adjustable pulse width and high time resolution(0.25ns), single chip microcomputer implementation PC port is used to set the parameters for circuit delay;3. A circuit for generating negative high voltage pulse is analyzed and designed to input the lower-voltage pulse into the power MOSFET switch to control the charging and discharging of high voltage circuit, and ultimately a negative high voltage pulse is produced to control the high-speed camera shutter strobe;4. The final measurement results are obtained with the simulation verifying analysis of each core function module after completion of the entire circuit system design and the debugging of the hardware and software system after completion of the PCB production.The main innovation of this dissertation lies in a conjunction usage of multi-chip analog delay line chip and the logic gate, applying the CPLD to configure the two delay line chain, making a splitter comparison of the delay signal and an accurate modulation of the pulse width based on the basis of controlling the delay time. Both a wide range delay and an accurate adjustment of the pulse width can be obtained by making a full use of the delay line chip.The results of the experimental board reveal that the entire circuit is of feasibility and can produce a negative high voltage pulse with adjustable pulse width.