Facing The Lte - A Multi-core Parallel Decoding Study Of Channel Code

The higher data rate required and the more complex algorithm adopted innext-generation mobile communication system makes the baseband signal processingcomputation burden sharply increasing. Multi-core parallel processor is asuitablehardwave structure to response the data-concentrated stream load, and thus the parallelprocessing algorithms study of baseband signal for multi-core processors has bigsignificance. As a important resource of baseband system delay,channel decodingalgorithms occupy an amount of computation of the baseband signal processing, thusthe study of multi-core parallel decoding for LTE-Advanced channel codes is the key tobuild multi-core parallel micro-architecture and to implement the parallel processing ofbaseband system.In this thesis, the multicore parallel decoding of tail-biting convolutional code andturbo code for LTE-Advanced is studied, where the main contents and contributions areas follows:(1) The CVA, WAVA and BVA decoding processing of tail-biting convolutionalcode are studied.The simulations are modeled, and the performance of those algorithmsis compaired.It proves that the BVA causes about0.5dB performance loss but has thenature of parallel processing, so the dual-core parallel decoding system of the tail-bitingconvolutional code for LTE-Advanved is designed and verificatied based on FPGAplatform with multiple PowerPC cores.(2) The MAP series decoding algorithms and sliding-window technique of theturbo code are studied.The simulink model of baseband communication system forLTE-Advanced’s transmission channels is setup, and the floating-point simulation of thedecodeing algorithms is done by m language. The results show that Max simplificationpayes about0.5dB performance loss penalty to reduce the complexity of the Log-MAPalgorithm. Moreover,(12,8) quantization scheme is adopted in fixed-point simulationand the decoding performance loss of quantization is0.1~0.2dB.(3) The overlapping of the sequence and sub-block division method is adopted todesign the multi-core parallel decoding architecture of turbo code.The circuits of the QPP parallel interleaver are designed.What’s more, after verifying the parallel decodingalgorithm with matlab, the quad-core parallel decoding module of the turbo code forLTE-Advanced is designed and verified based on FPGA platform with multiplePowerPC cores.