A Novel Synchronization Method For DS-CDMA System

Code division multiple access (CDMA) has been proven to be a promising spread-spectrum multiple access technology due to its advantages such as anti-interface, good ability of hiding information and high utilization of bandwidth. However, the asynchronism between sample clock and received signal at receiver would degrade performance of bit error rate (BER). Take the spread spectrum chip STEL-2000A as an example, there is probability of asynchronism between the sample clock and signal in front end processor (FEP) of the matched filter. In this paper, we research on the strategy of CDMA from theoretical analysis, Matlab simulation and hardware evaluation to deal with the algorithm of FEP at receiver of STEL-2000A.We first discusses the basic concepts and theories of the CDMA and then give a basic introduction of STEL-2000A. On the basis of extensive data collection, the current method of synchronism is listed and present some modeling analysis on the STEL-2000A. The signal is analysed from transmitter to receiver step by step, a detailed derivation of formula about the differential demodulator and frequency offset estimation is presented. We discuss on the sample method and sample probability of FEP which belongs to the STEL-2000A’s matched filter. The effect to DS-CDMA caused by sample offset is presented after the BER simulation of the algorithm of FEP in STEL-2000A. Finally, a novel synchronization algorithm to reduce the high BER due to the asynchronous sample is proposed on condition that sample rate can’t be increased. This algorithm is proved to be a best synchronization solution in PN matched filter bank. Simulation results show that the proposed method performs almost as good as the case of perfect synchronization and far better than when there is a clock disparity.Finally. The proposed algorithm is also implemented in field programmable gate array (FPGA) and compared with the traditional approach.