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PowerPC Altivec-based Simulation Technology Research And Implement

Posted on:2013-03-09Degree:MasterType:Thesis
Country:ChinaCandidate:Y YuFull Text:PDF
GTID:2248330362975121Subject:Control theory and control engineering
Abstract/Summary:PDF Full Text Request
Advanced industry engineers are now using Model Driven Engineering to constructhigh level models of the system in most design program. The SimSoC frameworks supportHigh Level Abstraction, so that we will be able to fully execute the real application code(instead of using a high level mathematical simulation) on virtual hardware. Initially thevirtual prototype can model the hardware at a high level of abstraction, for example withalgorithmic functional simulation. Then, from this high level model are derived moredetailed models. The refinement from initial model to detailed models can be done inseveral steps from the hardware formal description. An advantage of this approach is thatthe embedded application software can be run onto the virtual prototype and immediatelytested. Fast virtual prototyping platform has become the key of embedded SoC systemco-design.As embedded devices are composed of increasingly sophisticated hardware andsoftware, this is a challenge to provide feed-back to the design engineers aboutperformance estimate of the hardware, and detecting bugs in the models by relatingruntime errors to model defects. Therefore, the study of new simulation architecture andoptimization techniques, development of efficient and credible virtual prototype platformmake an important significance in the field of embedded systems software. In the lastdecade, researchers focused on virtual prototyping of32-bit and64-bit embeddedprocessors, but less focus on virtual prototyping of the128-bit co-processor. In fact, theperformance of the co-processor directly impact the performance of embedded systems incertain applications, such as multimedia, vector graphics, communications and otherhigh-throughput applications. With the growing of multimedia applications based in128-bits co-processor, there will be more challenges in the feild of virtual prototypingresearch. Some questions never been solved such as Approximate-Timing simulationtechnique (AT), compiler optimization techniques (such as LLVM), variable-lengthinstruction encoding technique (VLE). In this study, research a new approach as thestarting challenge of embedded system design and simulation, combine with advancedmodeling and system verification techniques, excogitated simulating and testingprograms based on the PowerPC AltiVec128-bits ISS and the Low Level VirtualMachine (LLVM) compiler and Variable Length Encoding technology of virtualprototype to achieve the ultimate high-quality and efficient PowerPC AltiVec fastsimulator for embedded on-chip system based on SimSoC virtual prototype.The main work of this paper as following: First, propose a new method to build the GCC cross-compiler based on the PowerPC AltiVec128-bits co-processor architecture. Itsportability fast and full support for the PowerPC AltiVec Instruction Set and the AltiVecsystems built-in functions. Second, in order to study the virtual prototype’s computing anddecoding efficiency, we excogitate three approaches and respective archive interpretedtechnique, non-refinement of dynamic translation technique and refinement of dynamictranslation technique to the design and realization of the PowerPC AltiVec128-bitsInstruction Set Simulator. Optimize the efficiency of simulator compilation based on therefinement of dynamic translation technique and the Low Level Virtual Machine (LLVM)compiler techniques. Variable-length instruction encoding techniques has been used in thePowerPC AltiVec Instruction Set Simulator to provide better code density, and improvethe utilization of the memory space. Third, analyse and verify efficiency and credibility ofthe virtual prototype implementation with running the embedded application through thedifferent modes of simulation techniques. Finally, the PowerPC AltiVec instructions setsimulator past complete unit testing, integration testing and system testing with trackingand analyzing in order to achieve the verifiable performance.
Keywords/Search Tags:Virtual Prototype, AltiVec, Variable length Encoding, Low Level VirtualMachine
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