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Characterization Of RF LDMOS Power Transistors

Posted on:2013-12-28Degree:MasterType:Thesis
Country:ChinaCandidate:W M ZhangFull Text:PDF
GTID:2248330362961795Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
RF LDMOS power transistors have evolved to dominate in the RF power applications owing to the advantages of low cost and high performance. The RF performance of these transistors, such as efficiency, gain and noise figure, is mainly affected by the parasitics inherent within the devices. Intensive research on the relation between the parasitics and device structure parameters helps understanding cause of the parasitics, and how to reduce their effect on practical design, thus achieving optimization of device performance.In this paper, an analytical model for the drain-source breakdown voltage of the RF LDMOS power transistor with Faraday shield is derived on the basis of the solution of 2D Poisson equation in p-type epitaxial layer as well as n-type drift region by means of parabolic approximation of electrostatic potential. The model captures the influence of the p-type epitaxial layer doping concentration on the breakdown voltage, compared to the previously reported model, as well as the effect of the other device parameters. The analytical model is validated by comparing with numerical device simulation and the measured characteristics of LDMOS transistors. Based on the model, optimization of LDMOS device parameters (drift region length, faraday shield length, drift region doping concentration and epitaxial layer doping concentration) to achieve proper trade-off between the breakdown voltage and other characteristic parameters such as on-resistance and feedback capacitance is analyzed.In addition, a new small signal equivalent model and model parameter extraction methodology for RF LDMOS power transistor are developed in this paper, including the effect of resistance and capacitance of the epitaxial layer. Parameter extraction for all model parameters is carried out based on the de-embedded small signal S parameter measurement. On the basis of the extracted results and the corresponding device simulation data under different device bias conditions, the dependence of the model parameters, such as the source, gate and drain resistances, gate-source, gate-drain and drain-source capacitances, and transconductance, on the drift region length and the Faraday shield length has been analyzed in detail. Then the conclusions drawn from the above small signal analyses have been used to discuss the measured high frequency large signal power performance of the RF LDMOS transistors.
Keywords/Search Tags:RF LDMOS power transistor, device characterization, modeling, parameter extraction, performance optimization
PDF Full Text Request
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