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Research And Design Of Elliptic Curve Cryptography Chip

Posted on:2012-04-21Degree:MasterType:Thesis
Country:ChinaCandidate:Z M HuFull Text:PDF
GTID:2218330371962352Subject:Computer application technology
Abstract/Summary:PDF Full Text Request
Elliptic curve cryptography (ECC) algorithm is proposed by Koblitz Miller and Neal in 1985 independently. Its security is based on the difficulty in solving the discrete logarithm problem. Its advantages include higher security, shorter key length, and faster encryption speed and so on. It has wider application prospects than RSA. For more than twenty years, under the same key length, ECC needs smallest storage space, lowest bandwidth, and has highest security and encryption speed in the public-key cryptograph system.This paper is mainly about the realization of the elliptic curve cryptography algorithm in hardware. The main job of this subject includes three parts. Firstly, we need to design the structure of the ECC system in hardware. Secondly, we have to finish the function simulation of those basic operation modules. In the last step, our job is to realize the function of the ECC using the software QUARTUS II and test the function of the system using development board in the FPGA level. The paper will give different algorithms for the operations in finite fields and find the most appropriate one for the realization of hardware through comparing their performance and complexity. The operations mainly include addition, multiplication and square for ECC in finite fields. For the operation which has to find the inverse value of it, we use three basic operations to realize its function. So the operation module only includes addition operation, multiplication operation and square operation.The paper introduces the point multiplication algorithm detailed, because the point multiplication is the core of the ECC. Through the comparison , the Montgomery is the best algorithm which can reduces the computation time effectively, resists attacks and enhances the security. This design uses top-down design process when we design the structure of the system, and uses bottom-up design process when we realize the function of the modules. The design uses Verilog hardware description language to realize the function of the system except the storage modules. We use the Quartus II to compile the system and the development board whose type is EP1C12Q240C8 to verify the function of the system.
Keywords/Search Tags:ECC, ECDLP, Montgomery, RTL, FPGA
PDF Full Text Request
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