Embedded Laser Active Imaging Research, Image Processing System

Laser Active Imaging (LAI) system combined the principle of laser, range-gated imaging technology, image processing, target recognition and the target detection, realized long range target detection in low light environment. Because of the irreplaceable advantages, Laser Active Imaging plays an important role in the military field and the civil field.When laser which used in Laser Active Imaging propagation in atmosphere it is backward scattered. Backscatter restricted the power of laser and system's detection range, especially in the conditions of adverse weather. In addition, because of the imaging principle and imaging device, images which laser active imaging system acquired often contain a lot of noise, have low signal-to-noise ratio. The above two factors seriously restricted the laser active imaging system performance. Therefore, backscattering suppression and laser active imaging image processing have a realistic significance.In the inhibition of backscattering aspects, this paper expounds the range-gated technology on inhibition of backscattering important role, based on synchronous of the laser and detector, this paper design range gated imaging control module on FPGA, In the image noise reduction aspects, this paper analyzes generating mechanism and mathematical model of the laser active image, in the light of image noise characteristic, drawing lessons from the image noise suppression algorithm of infrared image, radar image and LLL image, and considering the real-time, This paper presents an noise suppression algorithm with adaptive median filtering and wavelet image, and use Matlab verify the effect of this algorithm, At the end of this paper, realize the image processing algorithm based on the FPGA platform, design the structure of the software system and partition function module, and the use FPGA and VHDL hardware description language to write code of each function.In this paper, the realization of image noise suppression algorithm based on the the FPGA, adopt the pipeline architecture, by changing the pipeline register location shortens the critical path length, maximum reduces the occupied resources.