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Continuous And The Frame Burst Error Tester Design

Posted on:2013-01-07Degree:MasterType:Thesis
Country:ChinaCandidate:X Y WangFull Text:PDF
GTID:2218330371959808Subject:Electronics and Communications Engineering
Abstract/Summary:PDF Full Text Request
This paper introduces a design and implementation of BER tester using for continuous communication and burst communication in frame. This BER tester is based on FPGA. The main work of this paper lies in the design of PCB with FPGA and underlying development of FPGA. The underlying development takes a top-down modular design and each functional module which is called by top-level entity in a circuit diagram is designed with hardware language VHDL. And the paper discusses in detail the design of the module of pseudo-random code generator module, synchronization module, error detection module and the PC 104 and the FPGA interface module.The BER tester is able to test the BER of the continuous communication and burst communication in frame. The BER tester of continuous communication uses the continuous pseudo-random codes as testing data for sending and receiving. The BER tester of burst communication in frame uses the data in frame for sending and receiving, and the parameters of the frame are adjustable. The method of frame synchronization periodically inserts frame synchronization codes of fixed-length at the start of a frame and the frame synchronization codes are a serials of consecutive numbers. And the receiving end uses theory of mojortity decision to reduce interference in the transmission, so that a more accurate frame synchronization.ARM8019 in the paper is an industrial board based ARM and an embedded computer running Linux of operating system. ARM board is used for the display and parameter settings, and needs to design interactive software. Therefore, the design of the BER tester has a simple structure and the advantage of easy updating the software in the tester. The paper has completed the design of the FPGA circuit of the BER tester, the production and debugging of the PCB; The PC104 bus has realized the communication of the data between ARM8019 and FPGA;The BER tester designed in the paper has realized the self-testing, which can verify the feasibility of the design.
Keywords/Search Tags:BER, FPGA, burst communication, pseudo-random sequence, synchronization, embedded systems, theory of majority decision
PDF Full Text Request
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