Step Frequency Mmw Radar Frequency Synthesizer Design

This paper takes the frequency synthesizer of the step frequency radar as the object of studying and designing. It has analyzed the working theory of PLL, as a basic, also has analyzed on the performance evaluation of the PLL. Detailed mathematical deduction and calculation are done for the PLL noise model and hopping time of the frequency hopping frequency synthesizer. Analyzed the method which can improve the frequency hopping speed. According to the requirement of this research, this paper ascertains the research and design plan.According to the requirement of the research of the step frequency radar, this paper divides the design into three parts, one is synchronous control signals, two is I/Q demodulation signal and three is the design of frequency synthesis part. Synchronous control signals are a range of signals strong in timing which are did by program. The I/Q demodulation signal is a 40MHz sine wave signal. To insure the spur and the noise performance of it, a band pass filter is designed for filter process of it by the ADS software. The method of frequency synthesis design is digital PLL. Two ways of the frequency synthesizer are L wave band frequency hopping signal, the other is 8.52GHz steady signal. The value of the PLL is got by the ADS software simulating and theory calculating.The main control chip of the system is FPGA chip, the program in which produces the synchronous control signals. The 40MHz sine wave I/Q demodulation signal is produced by the system crystal oscillator. Frequency synthesis signal is designed by ADF4106 PLL chip. FPGA chip provides the frequency divide data which needed by the PLL chips. After the software and hardware are designed, debug the system.After the practical design and test, the synchronous control signals, I/Q demodulation signal and the synthesis frequency signals of the frequency synthesizer could satisfy the needs of the system which is a verification of the research method of this paper.