The Design And Implementation Of High-speed Large-capacity Range Matching TCAM

Content-addressable memory (CAM) is essentially a hardware-based search engine. More and more attention has been paid to it for its advantage in search speed, and it has become the critical technology of routing nodes in current backbone network. However, one of its important disadvantages is the poor efficiency in range matching, which not only reduces the speed of packet classification and forwarding, but also wastes mass of storage space. Although the software algorithms can be used to raise the storage utilization ratio, they cannot meet the requirements of high-speed network. Thus how to achieve high-efficiency range matching CAM in lowest cost on the premise of high-speed search has climbed to one of the important study topics of CAM, and to propose high-efficiency range matching CAM structure is of important theoretical significance and practical value for enhancing internet speeds.In this thesis, a preliminary study of the range matching efficiency of CAM is done, and an effective solution with an improved circuit is proposed. First, an improved high-efficiency range matching CAM (RM-TCAM) core scheme is proposed and is simulated under a variety of technology nodes against the high-power problem of range matching word circuit in routing nodes of the present internet protocol. Under the 130nm technology node, there are a 0.405ns maximum delay and 2.37fJ/bit average energy dissipation per search for the 128×16bit improved range matching word circuit, that is a 2.4% increase in search speed and a 89.0% decrease in power consumption compared with the original circuit. Finally, a high-speed large capacity RM-TCAM interface controller is designed in pipelined architecture and the associative functional model is set up according to the proposed RM-TCAM core scheme against the issue for the product, including a rather comprehensive functional simulation and verification. The results of synthesis verification show that the TCAM interface controller can work properly in 300MHz system clock and can sustain single decision rate of 150 million per second for 72/144-bit data words in theory, which meet the design requirements. And the outcomes of functional simulation and FPGA verification indicate that all the functions of RM-TCAM such as read, write and search suffice the design requirements.The designed high-speed large capacity RM-TCAM can be applied to fields that need range matching, such as network firewalls, virtual private network filters and other advanced network applications. In addition, the interface controller is of potential practical value, as it can drive not only the proposed RM-TCAM core but also the traditional TCAM core with the same capacity, and is easy to upgrade and expand.