Key Techniques Research Of Stream Multi-core Architecture Based On Shared Frontend

Currently, chip multi-core processors are mainly developing in two directions: multi-core processors consisted of a few complex cores (Traditional Multi-core Processors, such as servers and desktop CPUs) and many-core processors consisted of many simple cores (Multi-core Stream Processors, such as GPUs).They both have own advantages and disadvantages. Traditional Multi-core Processors are designed for different kinds of applications, own many control units and cache units ,and are easy to be programmed, but they do much worse in compute-intensive applications than MSPs. Multi-core Stream Processors are designed for compute-intensive applications, owns abundant ALU units and can generate high throughput, but the programmability is a little poor , the utilization coefficient of the hardware resource is relatively small and the MSPs'performance is much lower than the TMPs'performance while dealing with memory-intensive applications and sparse applications. In order to take advantage of the two kinds, the heterogeneous architecture, which is made up of CPU and GPU, has emerged. However, there is a bottle neck in the heterogeneous architecture's performance, and its power is relatively high. Based the above background and attempting to solve both the present problems of TMPs and MSPs, the Homogeneous General Purpose Stream Processor (HGPSP) architecture is proposed. There are a few stream multi-core processors in the architecture. The stream multi-core processors can be configured to be a part of CPU or GPU. Chip shared memory can eliminate the data transfer overhead between CPU and GPU. The 64-bit RISC cores can enhance programmability. The dynamic configuration function of the stream multi-core processors can increase the resource utilization. The stream multi-core processor is the basic unit which can be configured.In the thesis, the key technologies of the Stream multi-core architecture have been studied. The main work and innovations are as follows:First of all, the stream multi-core architecture based on shared frontend is proposed. In order to meet the needs of the different kinds of applications, a few of homogeneous stream multi-core processors need to constitute the CPU and the others need to constitute the GPU. The thesis has systematically studied the characteristics of the multi-core architecture, including the origin of the multi-core processors, the traditional multi-core processors, the stream processors and the multi-core processor based on shared frontend. Then, the thesis has proposed the stream multi-core architecture based on shared frontend grounded on the study of the multi-core processor architecture. The stream multi-core processor based on shared frontend can work in the way of chip SMP or SIMT.Second, we discuss the key designing of the stream multi-core processor architecture based on shared frontend. The design is based on the extended 32-bit Microblaze soft core. The key components mainly involve the extended Instruction Set Architecture, the Pipeline extend and Performance optimization, the Instruction Address Generation Units, the Instrution_Cache, the Data_Cache, the Memory Manage Units and the Prefetch Buffer. The configurable stream multi-core processors have built the foundation of HGPSP.Finally, we has verified the function of the key components of the stream multi-core processor against Isim12.1 and done some performance analysis. The result of the verification has demonstrated that HGPSP is well designed and the Performance analysis has showed the effectiveness of the design.