ASIC Design And Applications Of Stream Cipher Based On Chaos

With the development of information industry, the number of data needed to be encrypted is increasing and the complexity of cryptographic algorithm is higher and higher. The traditional encryption method using software does not meet the speed requirement, so it is significant to research the implementation of cryptographic algorithm in ASIC.This paper planed chip's function according to cryptographic algorithm's application requirements, designed chip's system architechture, and implemented chip using Verilog hardware description language in modular approach. During the design process, decomposed the multiplication and optimized chaotic map using pipeline strategy to improve timing performance; discarding the invalid bits of chaotic map and simplified encoding operation using look-up table method to reduce realizing complexities and resource consumption; parallel-transformed each codes in codebook in no-linear transformation and used resource consumption to exchange for timing performance; designed a uniform control logic for read/write registers to shield the difference between input/output interfaces; adopted ping-pang operation to guarantee continuous cipher stream output in several modules. Verified this chip in FPGA, the result shows that timing performance is right and it achieves the anticipated target.This paper also designed a application system using software hardware co-design method for cryptographic algorithm based on ML510 FPGA development kit provided by Xilinx Inc. Designed a custom IP core for the chip and builded a embedded system with PowerPC in FPGA. After ported PowerPC Linux operation system to ML510, designed drivers for custom PLB bus interface IP core and wrote applications for this system, accomplished cryptographic algorithm's application based on network.