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Research And Realization Of Real-time ISAR Jammer

Posted on:2012-02-02Degree:MasterType:Thesis
Country:ChinaCandidate:H Q LiFull Text:PDF
GTID:2218330362460323Subject:Information and Communication Engineering
Abstract/Summary:PDF Full Text Request
At present, Inverse Synthetic Aperture Radar (ISAR) imaging capability plays an important role in military applications, such as target classification, recognition and accurate weapon navigation. Jamming for ISAR is a hot topic in the field of electronic countermeasures. This paper focus on the method of deception jamming based on digital image synthesis (DIS). In allusion to the practicality method, the hardware system is designed. Deception jamming based on DIS is realized on the platform. The main works researched in this paper are as follows:The basic principle of ISAR imaging and the processing flow of imaging algorithms are analyzed. Firstly, several methods of noise jamming are analyzed. Then, deception jamming based on DIS is analyzed and the simulation result of the false target image is given.The structure and characteristics of ISAR jammer based on DIS are described in detail, and then the resolutions of system parameters are analyzed. In allusion to the characteristics of the method, we adopt processors which are fixable to the method and realize the method on the emulation mode of the hardware.A real-time ISAR deception jamming system is proposed; the high-speed signal processing board are designed and implemented. The system adopts the structure of DSP+FPGA, in which DSP generates the modulation parameters of target characteristic and FPGA modulate the radar echo based on modulation parameters. The system is powerful on computing and data communication along with the convenient parallel arithmetic processing structure. Experimental results show that the system can achieve real-time ISAR deception jamming.
Keywords/Search Tags:ISAR, digital image synthesis, quantizing, deception jamming, false target, DSP, FPGA, Real-time processing
PDF Full Text Request
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