Solving IC Package Warpage Problem By Applying Doe Method

Owing to its low cost, high performance and good reliability, plastic encapsulation is employed for a significant percentage of IC package. However, there is a quite large yield loss during using epoxy mold compound encapsulation in author's company process. The main purpose of this research is to study the IC package warpage and try to find a solution to solve this defect in IC assembly and testing process by applying DOE method. And, discuss how the different parameter groups affect the IC package warpage,fine tune the key parameters for different application conditions to define the optimum parameter level including post molding temperature, molding pressure, cure time and other key parameters by design of experiment method. We choose the Taguchi quality engineering parameters design analysis and Signal to Noise Ratio to find optimum parameters for reducing the re-work rate and scrap rate in production line, save production cost by increasing the first pass yield.