The Research On Spread Spectrum Telemetry Intermediate Receiver

As the development of space technology, the disadvantage of traditional telemetry technology has emerged, such as bad multi-access ability as well as high probability of being intercepted and captured. On the contrary, Spread Spectrum Communication provides significant advantage in the aspects of strong anti-jamming capability, low probability of intercept, multiple-access operation and high resolution of distance measurement. Thus spread spectrum technology can overcome the shortcoming of traditional telemetry technology, making it the potential key technology of the next generation telemetry system. As the consequence, the dissertation investigates the spread spectrum telemetry intermediate receiver.PN(Pseudo Noise) code synchronization is considered to be the critical step of spread spectrum receiver as well as the whole communication system. Morever, telemetry system has higher demand for the PN code synchronization , therefore, the dissertation begins with the research on it. Based on the theoretical analyze of PN coding, the dissertation presents the advantage as well as the disadvantage of the presently widely used PN code acquisition and tracking methods.In addition, the dissertation designs the Analog-to-Digital Conversion, Digital Down Converter, PN code acquisition, PN code tracking and Demodulation hardware modules of the spread spectrum telemetry intermediate receiver based on FPGA(Field Programmable Gate Array) platform. In order to meet the need of fast PN code acqusition, the dissertation modify the Conventional Parallel Match Filter (CPMP). Focused on the large hardware comsumption of CPMP, the dissertation proposes a novel matched filter architecture: Time Division Multiplex Parallel Matched Filter (TDMPMF). With identical processing gain and acquisition time as CPMF, TDMPMF can reduce the hardware consumption by one half. Furthermore, simulation on Modelsim shows that PN code synchronization has achieved and base band data has been correctly demodulated.Finally, in order to validate the designed algorithm, the dissertation presents the design of hardware platform and preliminary test. It also provides the circuit detail of Spread Spectrum intermediate signal source, radio frequency source and intermediate receiver. Preliminary hardware test on the Stratic II pratform has shown that the error synchronization rate and error bit rate has reached the order of 10-5 and 10-3 respectivly and the advraged acquisition time is less than 4 PN code periods. The test has evidenced that the design can accomplish successful synchronization and demodulation .