| High-speed trains have been increasing rapidly in China. High-speed train tests appeare to be very urgent because of tains' high speed, precise structure and complexity of the line. The traditional testing equipments have defects, and the environments of high-speed train are special. So, a data reading and writing controller for high-speed train tests is being designed.The USB (Universal Serial Bus) technology is involved in the controller design.The design of controller consists of three parts:hardware design, embedded software design and PC software design. All the details of this design and programming are introduced in this paper.The core of the system hardware is the microcontroller STM32F103, which is a 32-bit, low-power and high-performance product of STMicroelectronics. Peripheral circuits include data acquisition circuit, local flash memory circuit and U disk interface. The flash memory is connected to the microcontroller via the unique FSMC (Flexible Static Memory Controller) interface of STM32. The USB interface chip CH375 connected the microcontroller and the U disk. The program stores the data in flash memory to U disk in FAT32 file format. The composition of circuit hardware modules and device characteristics are introduced in this paper.The embedded multitasking RTOS (Real-Time Operation Sysytem)μC/OS-Ⅱ, as a framework of the embedded softwares, divides the whole system function into four tasks. They are sampling data saving task, flash memory saving task, U disk saving task and communication task. The software structure of each task and the communication among them are involved here.The IDE (Intergrated Development Enviroment) on the PC is Boralnd C++Builder 6.0. With IDE's rich VCL library, software can be designed rapidly. The PC software has two functions, monitoring the embedded system and unpacking the FAT32 format data.Through the program debugging and system testing, it's confirmed that the system functions work, and the system solution is feasible. |
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