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Design Of The Main Control System Of EUV Camera Based On FPGA

Posted on:2011-03-18Degree:MasterType:Thesis
Country:ChinaCandidate:L HuangFull Text:PDF
GTID:2212330368495529Subject:Mechanical and electrical engineering
Abstract/Summary:PDF Full Text Request
The geospatial magnetosphere explosion, trigger by the high speed plasma from solar crown, is a significant causation of spacecraft breakdown in geosynchronous orbit. An effective method to detect the geospatial storm is to study the macroscopic action and microscopic structure of the plasmasphere. He+ ion in the plasmasphere will emit a ray radiation at 30.4 nm when exposing in sunlight. The intensity of radiation is direct ratio to density of He+ ions. Imaging the distribution of the He+ ion through its emission at 30.4 nm can be a main way for studying the plasmasphere. A Lunar Imaging Detection at Extreme Ultraviolet will be carried out in the 2rd project of Chinese Moon Program, in order to study the structure of plasmasphere and metamorphose during the solar activity.After introducing the background of imaging plasmasphere, the key techniques and theories of the imaging are described in detail, such as lunar imaging detection, Single Photon Imaging, Anode Detector Based on MCP. Then comes the mission of the main control system of Lunar Imaging Detection at Extreme Ultraviolet, followed by description to the design and implementation of hardware and software.According to the mission of main control system, spaceborne signal processing platforms based on ASIC, DSP and FPGA are listed in comparison and solution based on FPGA is finally chosen. XQR2V3000 which is selected as the core processor of the system, with external interface around it, composed the hardware structure. Then hardware design is executed, and hardware platform of EUV Camera is finished. In software design, the system is devided into modules, according to the basic design principle of programmable devices. The bus-handle module emphasizes time sepuence of the address decoder, bus-buffer and interrupt status register. The step by step control of the motors is based on annular pulse creator and location sensor. And the electic characteristic, external interface and work mode are major considerations of diffrerential communication modules, including RS-422 and LVDS. Algorithm of position decoding for the WSZ is executed in two different ways, parallel and serial. The consumption and processing speed of two solutions are listed in comparison, and serial solution is chosen at last. Data transfer rate of LVDS communication decides the capacity of data-buffer module, which is designed into Ping Pong structure. After all, a multiple clock network based on global clock networks, phase-distinguish and asynchronous FIFO is proposed, in order to improve the stability of the system.In the end, a positive conclusion is drawn based on the test results. When summarizing the thesis, lagecy shortcomings are listed to be improved in the following work, and some advices for the system optimization are presented.
Keywords/Search Tags:EUV camera, FPGA, data pre-processing, synchronous design
PDF Full Text Request
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