Dmb-th System Error Correction Code Application Algorithm Design And Simulation To Achieve

In 1948, Shannon published "A Mathematical Theory of Communication", which set the cornerstone of coding theory. Nowadays, error control coding theory has been an integral part of modern communication systems. The thesis, based on the project of "Performance Simulation and FPGA Implementation of FEC for Digital Television Terrestrial Transmission System", makes an in-depth study of channel coding of DMB-TH System. Main results are as follows:This thesis focuses on the encoding and decoding algorithms of LDPC codes. The decoding algorithms, including, BP algorithm, Min-Sum BP algorithm, Normalized BP algorithm, Offset BP algorithm, are widely used in engineering practice. For the LDPC codes of DMB-TH standard, we simulate the performance of the four different algorithms under the AWGN channel and the Rayleigh channel. Found by simulation and comparison, in a variety of modulation modes, the LDPC codes show very good performance near the ultimate performance, which is less than 1dB away from the Shannon Limit. Among them, Normalized BP algorithm and Offset BP algorithm perform the best. But under the Rayleigh channel, the Normalized BP algorithm shows better stability, which is worth considering as the FPGA implementation's algorithm. Simultaneously, we analyze the fixed-point quantization issues for the hardware implementation of the LDPC decoder.This thesis also discusses the hardware architectures of the BCH encoder/decoder and the LDPC encoder, including, 10-bit parallel BCH encoder, 10-bit parallel BCH decoder, and 254-bit parallel LDPC encoder. In order to verify the correctness of the design, the concatenated code encoder with a code length of 7493 bits and the rate of 0.4 for DMB-TH system is implemented by the device of XC4VLX200 of Xilinx's Virtex-4 family. The design is described in the Verilog hardware description language (HDL), and with the encoder clock frequency of 100MHz.