Based Research And Design Of Dds + Pll S-band Frequency Synthesizer

Frequency synthesizer, as an important part of communication systems, which's performance is good or bad directly decide the performance of the entire system. With the development of communication technologies, modern electronic system of indicators on the frequency synthesizer requirements are getting higher and higher. Therefore, for spurious, small step, phase noise, the frequency synthesizer put forward high demands. Spurious and phase noise, determines the system of the choice of performance and sensitivity, small-step increases the channel capacity, has always been the focus of the design and difficulty. In this paper, based on the theoretical study of the direct digital frequency synthesis (DDS) and indirect frequency synthesis (PLL), we put forward our own PLL + DDS program, which allows the system output 1kHz stepping, lower than-55dBc spurious and below -90dBc/Hz@10kHz phase noise goals.In this Paper, first, it introduce the development of frequency synthesis technology , and detailed analyze the advantages and disadvantages of DDS and PLL , the Paper also detailed analyze various combinations of DDS+PLL. This paper describes the design and debugging process of S-band frequency synthesizer, which's output is 2400~2500MHz. with analysis of the design and debugging process, we gave our suggestion. Which have some reference to the people who continue engaged in related work.