The Power Device Package Failure Analysis, And Electrostatic Discharge

With the increasing working voltage and current of MOSFET,and the decreasing size of chip,the inner electric field of MOSFET is getting larger and larger.These factors have imposed new challenges on the reliability of MOSFET.The enhancement of the reliability of power device has become an important concern of the industry.Finding out the failure mechanism by failure analysis,and then improve the materials and package process is an effective way to improve the reliability of device.The research work of this paper is focused on the package of power device and the ESD failure analysis.The paper can be divided into 3 parts:The first part closely studied varied kinds of package failures,and concluded common failure modes,failure analysis flow and methods during manufacturing by the package flow process of power devices.The results showed that the failure mechanisms can be divided into 3 kinds,which is solder defects during die attach,wire defects during wire bond,and delamination during molding.On complicated cases of package defects,for example,bonding damage,die contamination by environment or improper operation,FIB,EDX or other analysis instruments can be also used.The second part focused on the voiding kinds and microanalysis methods of the soldering of device,and also paid attention on the voiding mechanism.The result showed that solder,reflow profile,soldering pad and plating,oxidation and the shape or pressure of soldering have different impacts on the voiding rate.The detection method which combined X-Ray and C-Sam on solder void is the most reliable and effective.The third part discussed the effects of ESD on the reliability of power device,analyzed the failure mechanism of ESD,and induced a electrical-thermal model of ESD on metal fuse,thus predicted the ESD failure threshold voltage.The model is verified by the simulation on an ESD test machine.It can help to estimate the ESD reliability of power device from the design part.