Study On Fatigue Failure Mechanism Of IGBT Module's Solder Layer

With the rapid development of power electronics technology,IGBT(Insulated Gate Bipolar Transistor)power devices have gradually become the core components of power electronics converters due to their high capacity,high voltage level,and low power loss.Under long-term operating conditions,power devices will inevitably have serious aging and reliability problems.Relevant research shows that the proportion of failures caused by excessive junction temperature of power devices is as high as 50%.One of the main failure modes is package-level failure,and the solder layer is one of the most vulnerable parts of the IGBT power module packaging structure.Therefore,studying the process and mechanism of fatigue aging and failure of the solder layer of power devices,and mastering the influence of internal parameters on chip temperature after power device solder layer failure are of great significance to improve its reliability and reduce failure rate.Therefore,this paper mainly explores the reliability of IGBT module solder layer,and conducts theoretical analysis,finite element simulation and experimental research.Specifically,the main research contents are as follows:First of all,this paper takes IGBT module as the research object,establishes a three-dimensional geometric model,performs thermal-structural multiphysics coupling simulation analysis on ANSYS simulation software,and masters the temperature distribution of solder layer of IGBT module under working conditions.Through simulation analysis,explore the relationship between the size,location,irregular distribution and thermal resistance of the crack damage of the solder layer,and grasp the influence mechanism of the solder layer failure on the thermal characteristics of the IGBT module.Secondly,the finite element software is used to establish a three-dimensional simulation model of the IGBT module with void damage in the solder layer,and the thermal simulation analysis is performed to grasp the temperature distribution of the IGBT module with void damage in the solder layer and analyze the change rule of its heat flow path.The effect of the size,location,and irregular distribution of void damage on the solder layer on chip junction temperature was studied.Thirdly,according to the material physical parameters and temperature characteristics of the IGBT module,an improved form of the Cauer thermal network model is proposed.The model not only considers the void damage of the solder layer,but also considers the relationship between temperature and material characteristics,which can effectively improve the IGBT module.The accuracy of the junction temperature estimation when the solder layer is damaged.Finally,an experimental platform is constructed,and the IGBT module is subjected to a temperature test under actual operating conditions.The experimental results are compared with the calculation results of the finite element simulation and the improved Cauer model,the validity and feasibility of the improved Cauer model considering cavity damage proposed in this paper is verified.