Broadband Satellite Modulation System Synchronization Technology Research

Broadband satellite communication, which inherits many advantages such as broad coverage, simple network topology and so on of conventional satellite communication will provide a variety of services including data transmission, multimedia and mobile communication with higher data rate and reliability. Phase shift keying (PSK) modulation has been widely used in digital video broadcasting satellite system (DVB-S) and the Iridium system. Synchronization technology is employed to achieve better performance of satellite demodulator.A feasible digital implementation design of timing synchronization and frequency offset correction module which are important elements of broadband satellite modulator is provided to meet the requirements of specific project. The content of this dissertation is summarized as below.Brief introduction of broadband satellite communication, illustration of the project background and content arrangement are presented at the beginning.Description of a specific QPSK all digital receiver design consist of decimation, match filter, digital AGC, symbol timing synchronization module, frequency offset correction module and decoding module is included in the following chapter. Project requirements have been taken into account during the design process.An open loop design of both timing synchronization and frequency offset correction which will lead to better loop behavior is provided for all digital demodulation. Afterwards, a detailed demonstration of the components in both loops is provided. The choices of Lagrange polynomial interpolation algorithm and Gardner timing error extraction algorithm result in a good performance of symbol timing synchronization. To cope with relative large frequency offset, PFD is chosen to gain a wider acquisition range.Simulation links are designed to determine certain key parameters such as detector gain, loop bandwidth and track-and-hold threshold. Results of several simulations are reported next. Analyses of the results will show that a good performance has been achieved by the design. Detailed descriptions of the digital implementation structures of both timing synchronization and frequency offset correction module are presented. Then pre-synthesis simulation is carried out to verify the logic function characteristic of the implementation structure design. After that, a solution to the problem of phrase ambiguity is provided. A test on the circuit board is carried out and the results show that the design of implementation structure is feasible for application.In the end, a summary together with some advice for further work are provided.