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Cmos-based Low Noise Amplifier And Mixer Design

Posted on:2009-12-18Degree:MasterType:Thesis
Country:ChinaCandidate:Y G YangFull Text:PDF
GTID:2208360245979044Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
In this paper, the key devices—low noise amplifier and mixer in the front-end of RF receiver have been studied, on the basis of the systematic analysis several typical structures of WLAN RF receiver and performance indicators. According to IEEE802.11a standards, ADS2003C of Agilent's circuit simulation software is used for the circuit design.Firstly, on the basis of the analysis and comparison of low noise amplifier's structure, work principle and performance targets, integrating a number of factors the structure of inductor source negative feedback and cascade has been chosen. The curves of gate width and noise factor are obtained by using the Matlab, which are references for the design. By using the simulation tool ADS, the low noise amplifier has been designed, optimized and simulation. The simulation results are: the enter echo reflection coefficient S11 and output echo reflection coefficient S22 are less than -30dB; the gain S21 is 13.9dB; the reverse gain S12 is -29dB; at 5.2GHz, the noise factor is 1.3dB; P1dB is -11dBm, IIP3 is about -2dBm. These results show that the designed low noise amplifier has achieved good input and output match and the higher positive transmission gain, the reverse isolation and linearity all have met the design requirements.Secondly, on the basis of the analysis and comparison of several typical mixer structures, fundamental and performance targets, the Gilbert unit mixer has been selected for the circuit design, then the noise analysis and the improved current injection structure has been given. By using the simulation tool ADS, the circuit has been designed, optimized and simulated. The simulation results are: frequency gain isl6.5dB; noise factor is 15.2dB; P1dB is about -15dBm; IIP3 is about -5dBm; quiescent operating current is 40mA, the power consumption is 72mW. These results show that: the performance indicators of the design of mixer have met the design requirements.Finally, after the simulation, the layouts of the inductors source negative feedback and cascade low noise amplifier and the Gilbert unit mixer have been designed, using TSMC 0.18μm CMOS technology library and the Cadence software. This paper has certain value for the RFIC design.
Keywords/Search Tags:Low Noise Amplifier, Mixer, CMOS technology, Layout design, ADS simulation
PDF Full Text Request
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