| Nowadays, the embedded non-volatile memory becomes one of the important parts of SOC system implement solution. As the rapid development SOC system, non-volatile memory embedding in a SOC system is required. This paper makes a research on non-volatile memory IP core embedding method and programming method in a SOC system. Based on the study of non-volatile memory program and erase theory, a gross structure of non-volatile memory IP core embedding is designed. Then the non-volatile memory ICSP (In Circuit Serial Programming) circuit and IAP (In Application Programming) circuit for SOC system are designed separately. Finally, a non-volatile memory IP core is embedded in SOC system.From the gross structure overview of project design, the non-volatile memory IP core embedding design is divided into three parts:1. Non-volatile memory ICSP circuit design: to design a non-volatile memory ICSP circuit which can erase program and verify the Configuration memory, Identification user information memory, Flash program memory and EEPROM user data memory used in SOC system separately.2. Non-volatile memory IAP circuit design: to design a non-volatile memory ICSP circuit which can erase program and verify the EEPROM user data memory used in SOC system when the SOC system is working normally.3. Non-volatile memory IP core embedding method research and design: to design interfaces between non-volatile memory IP core and SOC system which can ensure that SOC system can read data from non-volatile memory IP in normally working mode and the designed ICSP and IAP circuit can erase, program and verify the non-volatile memory IP core in Programming mode.During the design stages, all modules of ICSP and IAP in lower and higher level are verified by simulations. When the non-volatile memory IP core embedding accomplished, further simulations together with SOC system are carried out to verify the total design. At last, the layout design and verification will be carried out under SMIC 0.35μm 2P3M CMOS technics. |
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