Ir-uwb Frequency Domain Receiver Design

Ultra wide-band (UWB) as a new wireless communication technology has attracted worldwide attention. A typical UWB system transmits information symbols over a train of ultra-short pulses at nanosecond scales with very low power spectrum density. It pro-vides many advantages over traditional narrowband communication, such as high data rate, low probability of detection and interception, robustness for multipath and low power consumption. Further more, it can coexist with traditional narrowband commu-nication system and does not need additional spectrum resources. As a result, UWB has become one of the most competitive and promising technologies in the near future when the frequency spectrum resource becomes more and more precious. On the other hand, there are many challenges in the implementation of IR-UWB system, such as the design of receiver.The traditional receiver structure of IR-UWB is RAKE receiver. But accurate pulse synchronization and channel estimation are strongly required in RAKE receiver. In or-der to achieve good performance, the time delay and gain factor of each path in the re-ceived signal must be estimated precisely. Due to its unique features of very high time resolution, IR-UWB radio usually has more than one hundred resoluble paths. These characters enable IR-UWB to be robust to multipaths fading, but they also bring a criti-cal challenge to accurate timing acquisition and channel estimation, which are very im-portant in RAKE receiver. At the same time, over-sampling of the pulse requires ex-tremely high-speed analog-to-digital converters (ADCs) due to its wideband. As a result, realization of IR-UWB system with CMOS technology is of great challenge. Firstly, high-speed ADCs with a large amount of power consumption are too complex to be re-alized with CMOS technologies. And it is very expensive to be realized with other tech-nologies. Secondly, very complex and extremely high-speed circuits are required to do synchronization, channel estimation, equalization and so on [2]. High-speed ADCs, ac-curate timing acquisition and channel estimation have been two major challenges in the realization of IR-UWB system.In order to solve the two problems, a novel IR-UWB receiver architecture, in which all signals are processed in frequency domain (FD), is proposed in this paper. The proposed scheme achieves an A/D converting speed as low as pulse repeating rate (PRR) by frequency domain sampling method and accurate pulse synchronization is not re-quired. Theoretical researches and simulation experiments are done in this paper about some of key problems in FD IR-UWB receiver. Main contents and innovation points in this paper are as follows:Firstly, basic concepts and principles of UWB wireless communication systems, such as modulation methods and channel models, are introduced. The relative reseach works and main problems researchers facing are also briefly summarized.Secondly, the overall structure of FD IR-UWB receiver is proposed. FD sampling and FD pulse synchronization are discussed. As discussed later, the FD sampler achieves an A/D converting speed as low as pulse repeating rate (PRR) and accurate pulse synchronization is not required. The FD sampler can gather all the energy of the signal in the observation window. Two rough pulse synchronization algorithms, non-correlated energy detection method and FD TDT method, are proposed for the FD processing.Thirdly, FD frame synchronization, FD channel estimation and FD demodulation are discussed. Frame synchronization is achieved by sliding correlation in frequency domain. A maximal likelihood criterion is employed in FD channel estimation. The performance of FD channel estimation is analysised, and the Cramer-Rao low band is presented. The simulation results and theoretical analysis show that the MSE of channel estimation decrease linearly as SNR increase. Further more, the complexity of FD channel estimation is not impacted by the numbers of resoluble paths. Thus, it is much simpler than time domain (TD) channel estimation. The FD demodulation algorithm is also analysised. The simulation results show that the BER performance of FD receiver is the same as optimal receiver (ideal matched filter) in AWGN and in multpath channel (CM3) the BER performance is just 1dB inferior to that of ideal matched filter. But it is much simpler than ideal matched filter.Finally, the impact of pulse synchronization error and the numbers quantization bits of ADCs are analysised. Quantization the output of FD sampler by 2 bits can achieve 1.5 dB performance loss compared with the ideal receiver. The FD receiver is robust to the synchronization error. When the length of observation is 50ns, the accept-able synchronization error can be 25ns.In a word,a frequency domain receiver structure including FD sampling, FD rough pulse synchronization, FD frame synchronization, FD channel estimation, FD demodu-lation and decision are discussed. The proposed scheme achieves an A/D speed as low as pulse repeating rate and accurate pulse synchronization are not required. Simulation results indicate that there is only 1dB performance loss compared with the optimum re-ceiver. Further more it is much simpler and more CMOS friendly than matched filter. So this receiver structure solves the two problems, high speed ADC and accurate pulse synchronization, effectively.