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Fpga-based Color Recovery System

Posted on:2008-04-04Degree:MasterType:Thesis
Country:ChinaCandidate:J PengFull Text:PDF
GTID:2208360242956533Subject:Optical Engineering
Abstract/Summary:PDF Full Text Request
Considering the cost and complexity, digital image collection system usuallyemploys a single CCD or CMOS sensor. The sensor is covered with a Color FilterArray(ab. CFA) which limits each sensor pixel just sampling one of the three primarycolor values (red, green or blue). The most popular CFA is Bayer CFA. In order to getthe full color information, the other two missing color samples must be interpolated.This process is commonly referred as demosaicing. The former literatures havedescribed a lot of effective algorithms. Commonly, the complex algorithms arebelived to obtain better quality, but they consume more process time that are notsuitable for the hardware implement.This paper review some commonly used demosaicing algorithms and evaluatetheir superiority and deficiency according to the testing results of some typical images.Then we propose a interpolation project which suitable for hardwre implement basedon FPGA. Design timing circuit with verilog hardware design language based onFPGA of CycloneII series of Altera to control interpolation calculation process.Propose parallel operation design for long period complex calculation. Implementedhigh speed data transfers with 68013a USB2.0 chip manufactured by CYPRESS. Asof hardware design, four layers of PCB and the stable supply voltage outputted byPower Module are applied to make this system be characteristic of high integratedquality, reliability and flexibility.Last, the thesis indicates the deficiencies in the system and how to improve itsperformance. This system will be a useful reference for other similar systems in thisdomain.
Keywords/Search Tags:Demosaicing, Bayer, Color Filter Array, Color Interpolation, PNSR, FPGA
PDF Full Text Request
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