Combination Of Hardware And Software Of The Digital System Assessment Methods Research

System evaluation is very important to a digital system designer. In order to complete a precise system, digital engineer should give the system evaluation as early as possible. As a complicated system, competitive hazard is an important phenomenon in digital logical circuit. Besides, it is a meaningful research area for how to design and analyze and synthesize a complicated logical circuit well. In conclusion, how to detect the competitive hazard and give the evaluation of system could be a necessary research. Scholars have made a lot of research in this area, but the problem still exists due to the development of integrated circuits.Based on the theory of graph and macro model, several issues about system evaluation were discussed in this thesis as following,1) Did study on the phenomenon and causation of the competitive hazard in digital circuit, with discussions on the existing methods for detecting and eliminating.2) Took a look at the existing ways of digital circuit evaluation, gave the contrast and presented an evaluation arithmetic based on physical macro model.3) The modeling method and algorithm in 2) were accomplished by software in chapter4. The software is written in C language. By running it, the detecting of gates, where competitive hazard might occur, could be done. Besides, an example was given to verify the modeling method and the software, using 74LS138.