The Design And Realization Of Synchronous Sequential Circuit Fault Simulation System

Fault simulation is an important part of ATPG. First, with the increasing of the size and density of VLSI circuits, we need new effective simulators; secondly, the existence of unknown states in the sequential circuits makes many useful methods in combinational circuits ineffective. So, the research on the simulation methods of sequential circuits becomes very necessary both theoretically and practically.Concurrent fault simulation is a very good method for sequential circuits, but it needs too much memory. The author's main work is to improve the application of concurrent simulation in synchronous sequential circuit, speed up the simulation and diminish the memory requirement.The author combines the merits of concurrent simulation and single fault propagation, discusses the situation of fault effect reconvergence and its effect on the simulation speed and memory requirement. Briefly saying, when the single-event fault effects reconverge, we use the characteristic of FFR and single fault propagation; when the multi-event fault f' s effects reconverge, we introduce the equivalent inner functional block faults of f, and use the concurrent fault simulation method.In this paper, the author discusses the fault simulation system designed and implemented. It consists of three parts: circuit compiler, true-value simulator, and fault simulator. It can compile the circuit description with the format of ISCAS-89 benchmark, and true-simulate any combinational and sequential circuits, and fault-simulate combinational and synchronous sequential circuits.