Based On Ieee 802.1x Ethernet Access Control Chip Logic Design,

With the development of networks, Ethernet technology comes to be regarded as themajor technology being used in broad band IP access networks. Because thetraditional access authentication system in Ethernet dose not match the requirement ofthe access network developing at great speed, this dissertation figures out the waybased on IEEE 802.1x standard Port-based Network Access Control to design a newdevice used in the front of the network.The target of this dissertation is to design an ASIC, which is able to implementEthernet access authentication in a simple, cheap and efficient way followed standardof 802.1x. The device with this chip can be installed in front of Ethernet switchconveniently to connect to all the users.The system scheme of the chip is introduced in the beginning of this dissertation,including to design the functional block diagram, define the function of sub-module,and store and forward Ethernet frame with share storage switch fabric based on bufferdescriptor. The control state machines are designed after carefully analysis of 802.1xstandard. Then the Ethernet port that receives and transmits the data packets isdesigned in the way of Top Down. Timing and state machines of Rx/Tx MAC, statemachines of DMA, implementation of full duplex flow control and MII interface arepresented in the dissertation. Moreover, the key modules are described with VerilogHDL in RTL level. Finally, a testbench is written to simulate Rx/Tx module.