Font Size: a A A

Obs Edge Node Burst Assembly Algorithm

Posted on:2006-03-23Degree:MasterType:Thesis
Country:ChinaCandidate:J ZhouFull Text:PDF
GTID:2208360152497385Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
Nowadays, the scale of the Internet enlarges rapidly, the traditional layered network architecture is no longer adapted to the development of the Internet. IP over WDM is considered as a promising solution for the next generation Internet since it has fewer intermediate layers and can avoid some functionality redundancy in the intermediate layers like SONET/SDH. The optical routers can make better use of the advanced optical technologies and have more switching capacity than electronic routers. There are three possible solutions for optical switching technology: OCS(Optical Packet Switching), OPS(Optical Packet Switching) and OBS (Optical Burst Switching). OBS is refered to some technology where several IP packets with the same destination and some common attributes such as quality of service (QoS) are assembled into a burst and are forwarded through the network as a whole. OBS is considered as the most promising solution of optical transport network because when compared with OCS and OPS , it has a middle switching unit and combines their merit and avoids their defects. In this paper, how to implement the assembly algorithm of the edge node in OBS network on hardware is introduced. When data packets from 1000M Ethernets get into an ingress node, they firstly pass a 10B/8B decoder, and then they are stripped of their Ethernet package and added a label. According to their QoS levels and destinations, these IP packets are classified and scheduled into the appropriate assembly queue and the packets with the same properties are assembled into a burst. The assembly algorithm used by this paper is Min Burstlength Max Assembly Period algorithm. That is, when the length of the burst exceeds the predefined threshold or the assembly period times out, a request is generated. The implementation and simulation result will be listed, including the source consumption and the frequency of the system. We use Xilinx ISE as the development platform and Modelsim as the simulation tool. When simulating, how to provide the data source and combine it with the design entity is introduced too. The schematic of the ingress node and how to debug the PCB board are introduced in this paper so as to make the experiment carried on successfully.
Keywords/Search Tags:data burst, offset time, assembling algorithm, assembling queue
PDF Full Text Request
Related items