Music Algorithm Is Fast In The High-speed Processor,

To estimate the direction of radio signal is a very important mission in the Radio Reconnaissance. And it is also the most significant and effective technical method of Electronic Support Management (ESM) and information management in the electronic war. It includes many kinds of technologies in which Spatial Spectrum Estimation (SSE) is very important. As the most representative algorithm in SSE, MUSIC (Multiple Signal Classification) algorithm is always focused on by engineer for its statistic efficiency, high resolution, good accuracy, and more computational attraction (in contrast to MLE (Maximum Likelihood Estimation)). On the other hand, the applications of SSE in the real DF (Direction Finding) system are often in no real-time environments such as weather forecast and the location of ship with low speed. It often can not be applied in Electronic Surveillance and Mobile Communication, etc. The reason is the high complexity of variable algorithms of SSE and the speed of the systems in existence can not meet the needs of real time.In the last ten years, large scale digital IC technologies have grown up fast and FPGA is the most representative of them. The developments make the real-time applications of SSE algorithms possible. Whether the Magnificent FPGA parallel processing technology can help to disinter the potentiality of MUSIC algorithm in engineering area is a meaningful and hopeful idea. This is the emphasis in this paper. In short, a new design is given in which the peak-search algorithm (one stage of MUSIC algorithm) has been implemented with FPGA chipset in this paper. Parallel processing is the most important peculiarity in this design.The contribution of this paper is:A new pre-processing scheme with low complexity is given for the circular array with 8 antennas which can transfer the computational of MUSIC algorithm from plural number area to real number area and make system simpler.for the first time, A parallel method about peak-search algorithm for circular array of 8 antennas is given which help to improve the processing speed of system hardware. According to the thought of speed and cost, three hardware schemes are specially provided in which chipsets with different scales are selected and they all belong to APEX20KE series made by Altera Corporation. Using VHDL language, the design, synthesis and timing simulation of the three schemes have already been finished in the Quartus II software development environment. In the fastest 8-parallel scheme, the processing time of peak-search can be limited in 70us successfully each time. It is proved that the scheme can meet the requirement of real-time processing. By comparison, the processing speed of the new 4-parallel scheme is increased by 30 times over the existent design and the new 8-parallel scheme is much better which is about 60 times above.