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Hardware Architecture Design Of Two-dimensional MUSIC Spectrum Peak Search Algorithm Based On FPGA

Posted on:2021-12-29Degree:MasterType:Thesis
Country:ChinaCandidate:H S FangFull Text:PDF
GTID:2518306050457534Subject:Information and Communication Engineering
Abstract/Summary:PDF Full Text Request
At present,field programmable gate array(FPGA)is mostly used to implement one-dimensional multiple signal classification(MUSIC)algorithm.In order to make MUSIC algorithm more suitable for direction of arrival(DOA)estimation of incident signal in real environment,this paper uses FPGA to implement spectrum peak search of two-dimensional MUSIC algorithm.However,when using two-dimensional MUSIC algorithm for DOA estimation,it takes the longest time to implement spectrum peak search of the algorithm,and this part has the greatest impact on the real-time performance of MUSIC algorithm.And the difference between two-dimensional MUSIC algorithm and one-dimensional MUSIC algorithm is mostly reflected in spectrum peak search.But,the two-dimensional spectrum peak search involves a lot of computation amount,high computational complexity,and large consumption of hardware resources.Based on the above problems,this paper makes an in-depth study on the real-time performance of two-dimensional spectrum peak search,and proposes a realization scheme of two-dimensional spectrum peak search based on FPGA.The whole spectrum peak search can be divided into six modules,including the array flow pattern vector module,the spectrum value calculation module and the spectrum peak coarse search module of the coarse search,and the array flow pattern vector module,the spectrum value calculation module and the spectrum peak fine search module of the fine search.By analyzing the calculation characteristics of each step of the two-dimensional spectrum peak search,the reasonable design of its implementation structure is carried out,so as to meet the estimation accuracy and solve the problem of balancing the realization time and hardware resource consumption.The specific work includes the following aspects:1.The array flow pattern vector is transformed from complex field to real field by unitary transformation by preprocessing,which greatly reduces computational amount and complexity,and does not change the final DOA estimation result.2.In order to improve the real-time performance,the pipeline design is used many times to improve the calculation efficiency,so that the implementation time of spectrum peak search is greatly reduced.In the coarse(fine)search,the three modules are streamlined completely,the modules are overlapped,and the realization time is exchanged with hardware resources,which greatly improves the calculation efficiency and greatly shortens the overall time.And the pipeline design is also used to realize the three modules.According to the azimuth value,the serial situation of the array flow pattern vector and spectrum value is determined,and then the implementation time of the algorithm is determined.3.Module reuse is used to reduce the consumption of hardware resources.The development of lookup table and the parallelism of multiplier have the greatest impact on hardware resource consumption.The array flow pattern vector module of coarse search and fine search multiplexes the lookup table of sine value and partial multipliers,while the spectrum value calculation module of coarse search and fine search multiplexes another part of multipliers.According to the elevation value,the parallel situation of array flow pattern vector and spectrum value is determined,and then the hardware resource consumption of the algorithm is determined.4.In order to meet the requirements of estimation accuracy(1 °),it is necessary to improve the accuracy of each step of each module as much as possible.Through the operation of improving the accuracy of lookup table,the estimation accuracy of the algorithm is improved.The simulation results show that,the hardware implementation scheme can realize the two-dimensional spectrum peak search on the FPGA chip(the XC7V690 T development board of the Virtex-7 series)with the working frequency of 100 MHz.It takes 377 clock cycles to complete all modules,the time is 3.77 ?s,and the estimated accuracy is 1°.The hardware resources mainly consume the DSP48 E and the Block RAM,which occupy 31.31% and48.71% respectively.The simulation results show that when the number of signal sources is 1or 2,the SNR is greater than 6 d B,and the number of snapshots is greater than 80,the estimation performance of the algorithm is better.The main advantages of the two-dimensional spectrum peak search architecture are fast speed,high real-time performance and high engineering application value.
Keywords/Search Tags:FPGA, two-dimensional spectrum peak search, structural design, real-time performance, estimation accuracy
PDF Full Text Request
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