Digital Synthesis Signal Source And High-speed Data Acquisition Test Platform

This paper mainly discusses the realization and design principle of experimental system-virtual instrument communicated with computer by Enhance Parallel Port. This system mainly consists of signal generation, high-speed data acquisition, series experimental circuit and corresponding soft.Lastly,we also analyse the errors source of the system based on the data measured from the system,and give some anti-interference methods used in system.The signal generator is based on Direct Digital Synthesize, the maximal frequency of signal is 2.5MHz, the minimal frequency is 0.2Hz, its minimal resolution is 0.1Hz; in the module of data acquisition, we adopt a ADC which the range of sample frequency is 100KHz to 40MHz, and its resolution is 12 bits; the most digital logic is accomplished in CPLD (complex programmable logic device); the control and calculating is realized in computer, and the external hardware is communicated with computer by EPP of it; the software is programmed on the developing plat of Labwindows/CVI.Firstly this paper introduced the theory and technology of signal generator and data acquisition; secondly, it explains the realization of communication between system and computer, then it discusses the application of CPLD(complicated programmed logic device); last it describes programming environment.