Embedded Microprocessor-controlled Access And Interface Design

Due to requirements for high speed information processing and complex intelligent control, the circuits with microprocessor as core are used wider and wider. Research and design in microprocessor architecture can promote the development of our national IC industry and satisfy market demand.The work in this thesis is part of National 105'project. By studying CISC architecture and exploring design methodology, the aim is to design embedded 32bits microprocessor compatible of 486 instructions.Embedded 32bits microprocessor-AMEx86 is a high-performance CPU with ALU, FPU and MMU, which supports protect mode and pipelining execution. The content of the thesis is listed below:1. Analyze bus protocol of 80386 and design BIU with sizing bus supported. Especially emphasize design of pre-fetch queue and stability of signals;2. Design micro-instruction controller as the control path of CPU, propose double-clock stucture for micro-instruction controller, present detail design scheme for micro-program execute control;3. Design FIU to integrate IP core'FXU' in AMEx86, realize floating-point exceptions' detection and management, BCD and binary' conversion algorithm;4. Develop the simulation environment for full-instruction simulation of the microprocessor, module by FPGA to validate design in 80386 system;The thesis has contributed to the design of CISC microprocessor with full copyrights. It provides microprocessor IP core required by military SoC system and makes basis for military SoC design.