Simulation Analysis Of The Punch-through Structure The Triode Bv, <sub> Ceo Of </ Sub> And Consistency To Improve

From the practical implementation point of view, Bipolar Junction Transistor (BJT) faces a distinct tradeoff between reverse breakdown voltage in collector region (BVCEO) and output current performance. In other words, faster switching, smaller saturation initial voltage and lower circuit power loss could be expected when BVCEO is scaled down. However from the safe operation region (SOA) point of view, area of SOA is usually larger when BVCEO is higher. So it turns out to be quite necessary to control well the variation of BVCEO in BJT devices. In our experiment, in order to improve competition with other products in the market and provide best current performance with a small chip area, the BVCEO is confined around the lower end of application level, which is 410V-480V.A theoretical analysis is provided into reverse breakdown mechanism of Bipolar Junction Transistor (BJT) and a formular equation for reverse breakdown voltage in collector region is achieved. In the thesis, all variables in the equation are all substituted with practical technology parameters and a distinct relationship between BVCEO and technology parameters can be obtained. Following this relationship, we can take measures to stabilize this kind of variables, and achieve a stable value of BVCEO.In the thesis, theoretical analysis is firstly combined with corresponding experiments and calculation process, finding out the relationship between BVCEO and practical technology parameters. Afterwards, a large bunch of measurement datas of real products are utilized to confirm the practicability of our improvement technology for the consistency of reverse breakdown voltage in collector region (BVCEO). The detailed information is as follows:1. Single crystalline material is categorized by its resistivity with 1 ohm-cm interval, and sent to the manufacture process with no difference in other technology parameters. Afterwards, we can investigate the consistency of BVCEO in all candidates and compare the results with practical process with 3-5 ohm-cm interval.2. Predeposition over the substrate could be adjusted with different surface concentration Rs in different batches of wafers. Afterwards, all wafers are sent to manufacture process with no difference in other technology parameters. Finally, we can still check the consistency of BVCEO in all condidates.3. Process parameters and equipment parameters affecting the consistency of main diffusion junction depth in the substrate are summarized. According to the result in the thesis, we could confirm the improvement in the consistency through improvement of process technology and equipment stability.4. Present CMP process could be improved through increasing chemical erosion amount and deducting mechanical polishing amount, resulting in higher consistency of chip thickness and consistency of high resistivity layer.5. Design a theoretical model relating variation of BVCEO to variation of chip thickness for different single crystalline material with different resistivity. This result could be used to direct the choice of material in real production.6. Collect enough random measurement data in practical products, and do comparison of BVCEO with previous products.According to validation of process parameters mentioned above, the parameter control method and partial process flow have been improved. Meanwhile, quality control system is introduced to extend this technology.