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Design And Research Of Image Fusion System Based On Fpga

Posted on:2011-05-09Degree:MasterType:Thesis
Country:ChinaCandidate:W C FengFull Text:PDF
GTID:2198330338483448Subject:Measuring and Testing Technology and Instruments
Abstract/Summary:PDF Full Text Request
Image fusion has become the hot in recent years, but domestic and international research on image fusion technology is not deep enough and the system has not yet formed a complete and unified theoretical framework. So analysis the current implementation of several image processing hardware model and propose the idea of taking FPGA as core device to build image fusion system. Image sensor and infrared imaging system collect visible and infrared video signals separately, then sent to ADV7180 decoding to meet the BT.656 standard, using Verilog HDL and Quartus II Megafunction to complete logic design and timing control of each module, implement pixel level image fusion algorithm in FPGA and verify the correctness of system design by experiment.The entire system can be divided into initialization module, video capture module, color space conversion module, image storage module, image fusion module and image display module. Initialization module completes registers configuration of ADV7180 by I2C bus controller. Video capture module design PAL detect module and NTSC detect module through the different timing of PAL and NTSC in ADV7180, complete the design of decoding module according to BT.656 video standard. Color space conversion module can convert YCbCr data to RGB data for image processing. Image storage module using embedded RAM blocks to design four FIFO buffer, and SDRAM controller, which is simulated into a four-port read-write memory device to realize image RGB data storage and image frame buffer. Image fusion module take the weighted average fusion algorithm for example, propose the idea of the algorithm implementation and timing optimization, and give FPGA's RTL schematic of before and after optimization. Image display module designs a three-wire serial bus controller to complete the register configuration of LTM and design state machine to implement sequential control of LTM.Through module synthesis test, algorithm comparison test, image acquisition test and image fusion test to verify system correctness of the design of each module, initially build an FPGA-based image fusion system and provide a hardware platform for further research of image fusion technology.
Keywords/Search Tags:pixel-level image fusion, FPGA, Verilog HDL, modular design
PDF Full Text Request
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