Research On Power Analysis And The Defence Of A Class Of Cryptographic Algorithms

With the rapid development of the process of information society, the information technology has been widely used in social life. It brings a very serious security problem while can be better serve humanity. Information security is not only related to the immediate interests of individuals, but also deeply impacts the whole interests of the nation. So, cryptographic algorithms as the core of the information security, is researched and dicussed by the experts in related fieds both at home and abroad.The power analysis attack is different from the traditional attacking methods. It dosen't analyze the algorithm itself, but form the implement of algorithm. It is used to collect and analyze the valuable information of algorithms from the power consumption traces which are monitored when embedded encryption chip is working. The power analysis attack is simple and has a high successful rate, is becoming one of the most effective side channel attacking methods. It is necessary to study that how to break the encryption system using power analysis techniques and design security encryption algorithms that can resist power analysis.The thesis mainly concentrates on the key techniques of power analysis attack against a class of block cipher algorithms, AES and DES. Our main work is described as follows:We proposed a simple and efficient power consumption model. The relationship between power attacks and dynamic power is discussed based on the principle of power leakage of CMOS chips. Then, a simple and efficient power consumption model is proposed based on Hamming Distance and Hamming Weight. A principle to select D function and a power analysis attack scheme is proposed based on the model. Finally, the correctness and effectiveness of the scheme and the model are tested and verified through an example.We also proposed an improved AES algorithm to resist second-order power analysis. In light of Fixed Value Masking (FVM) cannot resist second-order power analysis attack, we proposed an improved algorithm to resist second-order power analysis based on the FVM method by combining with randomization and FVM extension method. And the design of improved algorithm IP core is completed.We developed the power analysis simulation software independently. The simulation software conducts the power analysis of cryptographic algorithm IP core which is described by hardware language. We can evaluate the cipher algorithm's design and performance to resist power analysis attack, shorten the development iteration cycle of embedded encryption chip, improve the efficiency, and reduce the cost by software modeling. The software completed the power analysis for original DES and AES algorithm, the function of second-order power analysis for FVM AES and improved AES algorithm. The modeling meets the theory analysis according to the test results. And the expectant goal is achieved.