Verification And Implementation Of Hardware-feature Protect Based On AES Algorithm

With developing of embedded system and programmable logic technology, issues of intellectual property rights in hardware system are much more concerned than before. In this paper, we focus to the rampant behaviors of hardware copying and infringement, and study a kind of HW authentication system based on the on-chip TRNG and AES algorithm. It is testify to achieve the hardware-feature protection in few costs.This paper discusses the solutions of hardware-feature protection. We select AES algorithm as the encryption of our HW-feature protect system according to the achieve costs and implement feasibility. We also propose a kind of mutual security policy by using random numbers as the temporary authentication. This paper presents two types of system architectures -- one-way authentication and mutual authentication. In the implementation and validation phases,we study the mathematical theory of AES, its algorithms, its processes and its security issues. Then,we complete the designs of each size of the HW-authentication system in standard C language and VHDL language. This article also describes the theory and the FPGA design flow of the on-chip True Random Number Generator (TRNG).In the testing and certification parts, we make efforts to the HW-design of the verification system and the data-analysis system. On the one hand,we build up a virtual instrument testing system with mass external SRAM memory,in order to meet the requirement of real-time data sampling and the need of functional verification. On the other hand, we use the standardized test tools of NIST and data-analysis system based on Matlab, to carry out a wide range of statistical analysis and security assessment.Through several times of functional verification and system analysis,we improve the HW-feature protect system according to the test results. This paper eventually achieve a kind of hardware-features protect system, which has excellent performance in few costs.