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Research On Policy Of Low-Power Based On Scratchpad-Memory

Posted on:2011-12-08Degree:MasterType:Thesis
Country:ChinaCandidate:M J YuanFull Text:PDF
GTID:2178360305494789Subject:Computer Science and Technology
Abstract/Summary:PDF Full Text Request
With the advancement of semiconductor manufacturing process and integrated circuit design capability, embedded devices become smaller but more powerful, which led to energy consumption have become increasingly prominent. According to former researches, storage subsystem is play an important role in system-on-chip's energy consumes. Thus, reducing energy consumption in memory subsystems becomes one of the most efficient ways to decrease the system energy consumption. Scratch-Pad memory is a fast directly addressed compiler-managed SRAM memory that replaces cache, it is motivated by its better real-time guarantees vs cache and by its significantly lower overheads in access time, energy consumption, area and overall runtime.This thesis concerns how to use the SPM to optimize energy consumption of embedded systems, lower the energy consumption caused by memory access, a compiler-directed SPM dynamic management strategy which can reduce the power consumption of storage subsystem is proposed, and the layout optimization of SPM impact on the system power consumption is discussed. But existing SPM dynamic management strategies only consider isolation program instructions or data variables as candidates which will be stored into SPM. To this question, a SPM dynamic management algorithm based on timestamp has been proposed. By analyzing the application's dynamic invocation situation, establishing call-relationship-based and timestamp-based extended control flow graph, generally considering the energy consumption of application program global variables, data, code, and stack on the system, selecting suitable program elements and then move to SPM from SRAM in order to reduce the energy consumption of the storage subsystem. Most existing researches focus on how to maximize the use of data in SPM without taking into account the impact on power consumption when access different SPM addresses sequence. To this question, a SPM optional lay out strategy based on circuit activity has been proposed which reorganize the layout of instructions and data in SPM, to reduce the circuit activity and power consumption when access Memory objects in SPM.Experiments simulation results show that when compared to existing SPM static management strategy, under the situation of same and limited capacity, with the timestamp-based SPM dynamic management strategies, the energy reductions generated by the same application can up to 31.3%. And when compared to basic strategy without the consideration of circuit activity, using the optional layout strategy can reduce energy by upto 18.7%on average for our benchmarks.
Keywords/Search Tags:timestamp, circuit activity, SPM allocation, dynamic power, overlay optimization
PDF Full Text Request
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