The Research And Design Of High Slew Rate Amplifier

In such data conversion system as analog to digital converter, sample/hold circuit is used to deal with the output signal from anti-aliasing pre filter. An amplifier with high slew rate can serve as comparator (also called single bit analog to digital converter) making up sample/hold circuit. Adopting high slew rate amplifier is one of the approachs achieving high speed ADC. The slew rate of amplifier used as comparator directly makes an impact on the sampling time of sample/hold circuit, and then the data conversion time of ADC.The design aids as follows mainly:Cadence Virtuoso Schematic, Cadence Analog Design Environment, Cadence Layout Editor and so on 0.35μm BiCMOS digital analog mixed signal fabrication technology is used for simulation, and 3.3V single power supply is employed.The whole circuit is composed of one main amplifier of high slew rate, four supporting gain-boosting amplifier, the common-mode feedback sub-circuit, the mirror current source voltage bias sub-circuit of large swing amplitude and the sub-circuit connecting reference current source. Owing to employing 3.3 V power supply, the amplifier is excluded from using the structure of source cross-coupled differential amplifier, that's why a structure of "high slew-rate input level plus mirror current source amplifier" is introduced into this article. High slew-rate input level can breakthough the limitation of capacitor load's charging current from the tail current source, but eventually it will be decided by such case that one of the input transistors transits from saturation field to linear one. Furthermore, the structure of mirror current source amplifier can magnify the charging current of the capacitor load, but the mirror proposition can't be too large, otherwise the input voltage swing amplitude will go down to some extent hard to accept. The using of single-level structure for improving the speed of the amplifier probably causes the gain lower than what intends. To solve this problem, the gain-enhancing structure is included in the design. Such structure can give attention to both the two indexes of high slew-rate and high voltage gain.Eventually, the slew rate of the amplifier goes beyond 1000 V/μs, gain is more than 110dB, unit gain bandwidth exceeds 500MHz and phase margin is 68°. Moreover, the amplifier has better frequentcy response and degree of stability. The designed amplifier overcomes the restriction imposed on slew rate by tail current, the main design indexes such as slew rate, unit gain bandwidth, phase margin, open-loop gain reachs the design require-ment, but the circuit structure is relatively complex, the power dissipation is bigger than normal. Therefore, it still has much room for making better.