Design Of A 256Bit EFuse In 65nm Process

eFuse is useful in CMOS chips for redundancy implementation in memory arrays,for one-time programmable, for field repair chip,for trimming resistors, ca-pacitors and other discrete components in analog circuits, for permanently holding information such as"chip-id"etc.This paper designs a 256bit efuse memory of sequential access(First-In Last-Out),the design is a project of the SMIC (Shanghai) Co., Ltd.. Polysilicon-fuse is the basic element of eFuse technology, Upon programming, the Polysilicon-fuse's show a large increase in resistance that enable easy sensing.Its performance is not only impact by material, but also dopants, temperature coefficient and the Program mechanism.Since the design in 65nm process, the chip area is so small.However, 65nm process resoult in many problems. For example, leakage power, NBTI (Negative Bias Temperature Instability ), and lithography capability.For propose of avoiding the effects of NBTI ,the eFuse storage unit adopt a differential circuit.SMIC's 65nm low-leakage process reduces leakage power . Moreover, in order to improve the reliability of the chip, as well as reduce the production cycle,the design adds DFM(Design For Manufacture).At last ,the paper analyzes the tape test resoult of the efuse ,the resoult shows that the design meets the specification of project.