Design Of Storage And Transmission System For Cone-beam CT 3D Image Reconstruction

With the rapid development of CT technology, cone-beam 3D CT gradually comes to be mature and practical, and becomes one of the important trends of CT technology. Compared with the traditional two-dimensional CT, cone-beam 3D CT has a higher utilization rate of radiation and a more precise spatial resolution. The image reconstructed by it is more intuitive and clear. But its image reconstruction algorithm is also more complex and its computational complexity is greater and it requires a higher memory bandwidth and a faster data transmission speed.To meet the requirement of the high memory bandwidth and transmission speed for cone-beam 3D CT image reconstruction and improve the speed of image reconstruction, this paper first discusses the feasibility of the three-dimensional image reconstruction implementation based on FPGA. Then, a comprehensive analysis of FDK image reconstruction algorithm for three-dimensional CT is made, a detailed introduction and comparison of the current popular parallel processing platform was made and a FPGA implementation method for cone-beam CT three-dimensional image reconstruction system is proposed. Finally, we focus on the realization of the hardware and software design of the data storage and transmission system.The hardware of the system includes the periphery circuit design of Cyclone III FPGA, the external circuit design of USB2.0 host controller(CY7C68013), the connection circuit between CY7C68013 and FPGA, the circuit design of the storage and the power supply circuit design. Each chip is chose based on the technology index in the hardware design,and the ports communicate according to the mode of the chips and the system function. The Paper gives the reason for each part of the chip select and the schematic diagram of hardware connections.The software of the system mainly includes two parts, one is the logic design of the storage system and the other one is the software design of the transmission system. The storage logic design includes a SDRAM controller and a SRAM controlling logic interface. And the transmission software includes the logic of the USB_FPGA interface, the USB firmware, the USB device driver and the user application interface.Finally, the data access rate of the storage system, the data transmission speed of the transmission system and the data accuracy of the storage and transmission system was tested. Results show that good performance of this system is made and the desired effect is achieved.