Design Of Embedded System For Vehicle License Plate Recognition Based On Support Vector Machine

The ITS (Intelligent Transport Systems) has been an major trend for future transportation supervising systems.The VLPR (Vehicle License Plate Recognition) system plays an core role in ITS.Thus it's essentially important for the development on transportation to research and develop VLPR system.The SVM (Support Vector Machine) is a newly presented theory in the filed of pattern recognition,which could solve problems exist in traditional pattern recognition methods and the ANN (Artificial Neural Networks) ,it is a highly feasible solution for implements of the VLPR system.The NiosⅡ, a series of soft CPU cores developed by Altera company, can be embedded in a FPGA and be together with user custom modules to construct a specific SOPC based on a FPGA.This thesis presents a feasible VLPR system solution based on embedded system technology,which includes:①A SOPC system is built.An embedded system with NiosⅡ/f soft CPU core was constructed on a FPGA,with functions of image data acquisition,image process, character recognition and result storing.②The image pre-processing are researched.Improved image binarization algorithm based on traditional image pre-processing methods;decreased probabilities of vehicle license plate character mis-segmentation by adding on segmenting threshold controlling factors to the projection-based character segmentation method;improved the decision conditions of character skeletonization in oder to improve the processing efficiency of this step.③The SVM theory and SMO (Sequential Minimal Optimization) machine training method are studied.This thesis discussed influences caused by parameters' variation to SVM classifier's sample separating capabilities,and got parameters specially appropriate to the SVM classifier for VLPR system through experiments,based on which the thesis presents a multi-classifier implement constructed by bi-classifier using one-rest method.④The hardware acceleration to improve the system's performance is used.Steps including image pre-process and SVM classifying during which the floating-point multiplying and exponential operations are largely used,as well as the median filtering process are main parts of the critical steps that influence the system's processing speed a lot,thus it's much better to implement these steps in hardware circuit instead of C programme.Experiments suggested that hardware implement instead of software could improve the system's performance to a great extent while maintaining the accuracy of calculations and recognitions.The application suggested that the FPGA based solution presented by this thesis is feasible and efficient,which is superior in speed,power consumption and flexibility than other methods.