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Design Of Face Detection System Based On FPGA

Posted on:2018-02-07Degree:MasterType:Thesis
Country:ChinaCandidate:Z J FengFull Text:PDF
GTID:2348330512467047Subject:Electronic Science and Technology
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Face detection is a kind of intelligent technology that uses the designed algorithm to retrieve a given image to determine whether it contains a face,and export the face information which contains location,size and expression of the detected face.As the development of science and network technology,traditional authentication methods is not safe.Therefore,researchers consentrate on the research of biometric identification technology such as fingerprint recognition,phonetic recognition,iris,retina,face detection and other biometric features recognition.Face detection has advantages of convenience,high-speed,friendly,flexible,which make this technology becomes an important process of utomatic identification.Meanwhile,face detection plays an important role in information security,property security,remote control,video monitoring and automatic authentication fields.Face detection has gradually become a hot research subject.In this thesis,based on the induction and analysis of face detection algorithm and implementation technology,we proposed a design method of face detection system based on adaptive boosting algorithm of FPGA which take full consideration of FPGA parallel execution characteristics to improve the detection speed and accurency.We used haar feature method to extract facial features;calculate feature values by integral image method;train weak classifiers into strong classifiers by adaptive boosting algorithm;improve the performance of strong classifier detection by classifier cascade method and completed translation and optimization from the algorithm and the principle to verilog hardware description language.Based on DE2 hardware platform,this thesis build a hardware detection system which contains image data storage module,video decoding module,detection module and output display module,each module is logicly designed by verilog language to complete the test of face detection system.The detection results show that the face detection system we build in this thesis realize the expected function.Image frame rate of face detection system reached36.65 frames per second with the accuracy rate of 90.35 percent in the real-time transmission conditions of 640 × 480 resolution screen through test,when a single camera is connected.
Keywords/Search Tags:Face detection, Haar feature, Adaptive Boosting, Cascade classifier, FPGA
PDF Full Text Request
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