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Research And Design Of 4GHz Frequency Synthesizer

Posted on:2010-07-27Degree:MasterType:Thesis
Country:ChinaCandidate:Y Q HanFull Text:PDF
GTID:2178360275997646Subject:Microelectronics and Solid State Electronics
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Along with rapid development of mobile communication technology and mobile communications market, high-frequency stability, low phase noise, broadband and multi-band will be trends for RF front-end frequency synthesizer.In this thesis, according to the requirements of the fourth generation of wireless systems a frequency synthesizer was designed and its output frequency is up to 4.22GHz. This paper designed a high-speed PFD without dead zone, charge pump with modulated cascode and complementary switch circuit structure, broadband VCO employing a binary-weighted switched capacitor array, auto-calibration circuit suppressing environmental changes, and eventually the completed the entire PLL frequency synthesizer system. Finally, several modules'layouts were finished in Virtuoso.In this paper, TSMC 0.18umRF circuit technology library was used, and modules were simulated in Cadence. Finally the system was modeled and simulated by ADS. Simulation results show that the frequency synthesizer has low phase noise, wide range, short locking time, and low interference by environmental. In 20MHz reference frequency, the system phase noise at 1MHz is up to -128dBc/Hz; in the loop bandwidth of 40kHz, the re-lock time is only 120us; its adjusting Range is from 3.3GHz to 4.8GHz, so frequency tuning range is 1.5GHz; And the frequency synthesizer can work in the 3840MHz, 4320MHz, and many other bands; the frequency resolution is 160MHz when at stable work, achieving high frequency stability. The descriptions above are in full requirement for the fourth-generation wireless system.
Keywords/Search Tags:VCO, PLL, Phase noise, Auto-calibration
PDF Full Text Request
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