The Design Of PCI Express Switch Port

With the development of network, communication and computer system,the master frequency of CPU is so high and the amount of data exchanged between the units is so 1arge that the finite bandwidth of PCI bus has become one problem, which is that the bandwidth (133MB/s) is not enough to be shared by the sound card, network card, video card, USB, and so on. Therefore, to design a new PCI bus becomes very urgent. PCI Express (3GI/O), as the third generation of universal I/O interconnects, is one better technology to solve the problem. This technology owns some advantages of high-speed, low pin count, low voltage differential signal environment (0.8~1.2 V) and point-to-point technologies for major bandwidth improvements.PCI Express can not only satisfy the requirement of huge I/O bandwidth, but also can be applied to desktop system, mobile system, server, communication system, work station and embedded system widely. As an advanced technology, the PCI Express has held many electronics engineers'research interests.This thesis mainly includes the two important components: the theory and the design of PCI Express.In the theory part, the specification of PCI Express will be introduced in summary. The transaction layer, data link layer and switch port are described theoretically, including structure, data packets, topological structure transaction type, transaction routing, virtual channel, arbitration and flow control.The design part can also be divided into two parts of circuit design and verification to the switch port of transaction layer and data link layer. According to the PCI Express protocol, the whole design is mainly divided into the transaction layer and data link layer. According to the function, the transaction layer is divided into transmit module, receiver module, flow control module and error handle module; the data link layer is divided into transmit module, receiver module, flow control update module, DLCMSM module and arbitration module. Finally, the simulation results are given and the correctness of the design can be proved by these results.