FPGA-based All-digital IF Receiver Research And Implementation

In this text, based on the direct spread spectrum communication theory, a design of the all-digital IF receiver, the use of Xilinx's FPGA chip xc3s400 as the main receiver chip to realize the digital signal frequency down-conversion, baseband modem, PN code Capture and tracking loop design and gives them the specific steps to design and RTL-level logic circuit. In this thesis, the DDC design, digital loop carrier recovery suppression of the design are discussed in detail, but also the use of Matlab in Simulink to the receiver systems to be used in all-digital loop Costas had a function and gives the simulation results.In this text, the use of high-speed analog to digital converter on the AD9601 IF sampling analog signals, then the final high-speed digital to analog converter AD9740 restore the original message, and they are given xc3s400 core chip interface design principles and circuit diagram.