Nanoscale CMOS Devices Realization With Micron Technology

Bulk silicon CMOS technology has always been the mainstream silicon microelectronics technology. With the CMOS technology into the deep sub-micron and even nano-era, how to make use of micron technology to achieve nanoscale CMOS devices, has become a hot spot in Si technology research. It is studied in this paper from the following four aspects.On the facet of etching and growth of thin film materials, which are commonly used in CMOS, etching technologies of SiO2,Si3N4, SiON, Poly-Si, Al are researched, dry etching and wet etching process conditions of materials commonly used are the focus of study.As for the structural design of nanoscale CMOS devices realization with micron technology, the key process, such as preparation of ultrafine grid lines using sidewall structure and formation of SDE by RTA solid-phase diffusion are in-depth study, an innovative extraction method of nano gate in micro technology is put forward and discussed in detail.In the process design, on the basis of standard CMOS process, the specific process steps and process conditions are given to achieve nanoscale devices by micro technology, the corresponding process parameters and layout design are also given. In the respect of experiment, based on the 2μm CMOS process of No. 24 Research Institute of CETC, process experiment of nanoscale CMOS devices realization with micron technology is carried out, ultrafine grid lines is prepared using spacer patterning technology, and then the experimental results are analyzed.